Cheat Sheet
Every formula, sign convention, and lookup value from all five tiers — sized for one double-sided letter sheet (the format confirmed on the S25 midterm cover page). Print it, don't read it.
SI Prefixes & Units
T / G / M / k / / /
m / μ / n / p / / /
AC/s · V = J/C
WJ/s = V·A
S (siemens), conductance
kW·h J
Charge · Current · Voltage
Current
Charge
Constant
Double subscript,
ReferencePolarity/direction is a choice. Negative answer ⇒ true direction is opposite. Never re-draw, just report the sign.
Power & Passive Sign Convention
Power (W)
Energy (J)
PSCCurrent enters + terminal ⇒ is power absorbed
Active configCurrent exits + terminal ⇒ ; element supplies
Balance over the whole circuit (supplied = absorbed) — always use as a check
Ohm's Law & Resistors
Ohm, ,
Dissipation always
Geometry, m
Ideal wire ⇒ zero drop; both ends are the same node
Open circuit (any ) · Short: (any )
KCL & KVL
KCL at any node (charge conservation)
KVL around any closed loop (energy conservation)
KVL ruleTraverse the loop; use the first polarity sign encountered ( + ⇒ add, − ⇒ subtract )
Seriessame current through every element
Parallelsame voltage across every element
Series / Parallel — All Elements
R series
R parallel; two:
Lseries ; parallel (like R)
Cseries ; parallel (opposite of R)
Zseries ; parallel
Dividers
Voltage divider (series only)
Current divider (2 branches, parallel only)
General CD
WatchVD: bigger gets more . CD: bigger gets less — the opposite resistor is on top.
AC formSame formulas with in place of .
Node-Voltage Analysis
1Pick reference (ground) — usually the − terminal of the largest source / most-connected node.
2Label at remaining nodes.
3KCL at each unknown node with ALL CURRENTS LEAVING — the course convention, keep it every time.
Branch term (this node's first)
To ground
Source at nodeIf ties a node to ground: , write no KCL there.
Supernodes & Dependent Sources
WhenA voltage source sits between two non-reference nodes (its current is unknown).
DoDraw a bubble around both nodes + the source; write one KCL for everything leaving the bubble.
Plus constraintKVL across the source:
Dependent srcTreat as an ordinary source, then add the control equation expressing or in node voltages.
NeverNever deactivate a dependent source (superposition, — see those cards).
Mesh-Current Analysis
1Assign a mesh current to every window pane, all clockwise (course convention).
2KVL around each mesh in the direction of its own current.
Own resistordrop
Shared resistordrop — own current first
Current src in one mesh directly; skip that KVL.
Src between meshesSupermesh: KVL around the outside of both, plus .
Thévenin & Norton
Thévenin in series with
Norton in parallel with
with the load removed
with the terminals shorted
Source-kill Only if no dependent sources: -src → short, -src → open, then reduce series/parallel.
Superposition
ProcedureLeave one independent source on, deactivate the rest, solve; repeat; add all contributions with sign.
Deactivatevoltage source → short (0 V) · current source → open (0 A)
DependentALWAYS left active in every sub-circuit.
NOT for power is nonlinear — sum first, then compute .
Wheatstone Bridge
Layout one leg; other leg; meter across the two midpoints.
Balanced ⟺
At balance, no current through the meter branch — it can be removed or shorted freely.
Unknown
Capacitors
i–v
v from i
Energy (stored, never dissipated)
Continuity cannot jump: (a jump needs infinite ); can jump freely.
DC steady stateopen circuit ( ⇒ )
Inductors
v–i (H)
i from v
Energy
Continuity cannot jump: (a jump needs infinite )
DC steady stateshort circuit ( ⇒ )
First-Order Transients
Universal
RC: · RL:
resistance seen by the C or L with sources deactivated, after the switch moves
Charge/dischargeCharging: . Discharging: . Charging current: .
Transient Procedure & τ Table
1: old circuit at DC steady state (C open, L short) ⇒ find / .
2Continuity: , .
3: new circuit at DC steady state ⇒ .
4 from the new circuit's ; substitute into the universal formula. Other quantities: get from / via Ohm/KVL, not another exponential.
Solve for t
AC Sinusoids & RMS
Course form
(rad/s)
RMS (sinusoids only)
Phase lead/lag. : leads (inductive). : leads (capacitive). .
Phasors
Phasor — magnitude + phase at a fixed ; time is dropped.
MUST DO FIRSTPut every source in one reference form (all sine or all cosine) before reading off angles.
Identity; — a minus sign is a shift.
MagnitudeState whether you're using peak or RMS phasors and stay consistent; AC power formulas below assume RMS.
Complex Arithmetic
Engineering (never — that's current)
Rect → polar, (if , add — calculators only return )
Polar → rect
+/− vs ×/÷+/− use rectangular. ×/÷ use polar: multiply/divide magnitudes, add/subtract angles.
powers, ,
Complex Impedance
Phasor Ohm
Resistor — , in phase
Inductor — leads by
Capacitor — leads by
Reactance, ; ; (S). : , (matches DC). : reverse.
AC Circuit Analysis
1Fix ; convert every source to a phasor and every R/L/C to an impedance.
2Every DC technique applies unchanged with for : series/parallel, dividers, node, mesh, Thévenin, superposition.
3Do the complex algebra (polar for ×/÷, rectangular for +/−).
same rules as , complex-valued. Series RLC: .
Resonance: cancels, (purely real, PF). can each exceed the source — normal, not an error.
AC Power (RMS values)
Real (W) — only dissipates
Reactive (VAR) — stored/returned by L and C
Apparent (VA)
⚠ Peak vs RMSThese need RMS. With peak phasors, .
Power factor, . Lagging = inductive ( lags ); leading = capacitive ( leads ).
Complex Power & Triangle
Complex power
NoteThe conjugate on is what makes . Forgetting it flips the sign of .
Conservation and each add over all elements: , . does not add arithmetically.
⚠ Q signWith and : for an inductive (lagging) load, for capacitive (leading) — matches the course's own worked example (, , lagging, VAR). One slide bullet states the opposite rule in words; trust this formula and the worked numbers over that bullet.
PF correctionAdd C in parallel to cancel inductive ; unchanged, drops, .
Ideal Op-Amp
⇒ no current into either input
⇒ ideal voltage source at the output
Golden rulesWith negative feedback: (virtual short) and .
Virtual groundIf is tied to ground, then V — but it is not a real ground; no current sinks into it.
SaturationOutput clips at the supply rails ; the golden rules stop holding there.
Inverting Amplifier
Circuit to ground; through to the node; from output back to .
Gain
Minus sign inversion — positive in, negative out. Do not drop it.
Example k, k ⇒ ; 1 V in gives V out. Always verify , else it saturates.
Exam Gotchas — Final Check
SignsPSC: current into ⇒ absorbing. Node KCL: all currents leaving. Mesh: all clockwise. Deactivating: V-src→short, I-src→open, dependent sources never.
Units & modeConvert kΩ/μF/mH before substituting (kΩ×mA=V; kΩ×μF=ms). Check degrees-vs-radians before every phasor problem.
Continuity & RMS, continuous at , everything else can jump. Power formulas want RMS, not peak. Superposition never for power directly.
VerifyKCL at one node + KVL around one loop + catches most arithmetic slips.